A. Field of the Invention
The present invention relates to semiconductor devices including a reverse blocking semiconductor device and a bidirectional semiconductor device, and more particularly, to trench gate semiconductor devices.
B. Description of the Related Art
In recent years, in a power conversion circuit which performs, for example, AC (alternating current)/AC conversion, AC/DC (direct current) conversion, or DC/AC conversion using a semiconductor element, a matrix converter has been known as a direct conversion circuit which can be configured without using a DC smoothing circuit including, for example, an electrolytic capacitor or a DC reactor. Since the matrix converter is used at an AC voltage, a plurality of switching devices forming the matrix converter need to be bidirectional switching devices with bidirectionality which can control a current in the forward direction and the reverse direction. As this type of bidirectional switching device, a bidirectional switching device has been used which is formed by connecting two devices, each of which includes a diode for a reverse breakdown voltage that is connected in series to a general insulated gate bipolar transistor (hereinafter, referred to as an IGBT) in inverse and can control a current in two directions.
In recent years, a reverse blocking IGBT (RB-IGBT) has been used as the above-mentioned bidirectional switching device in order to reduce the size and weight of a circuit, to increase the efficiency and response of the circuit, and to reduce manufacturing costs. The reason is that, when two reverse blocking IGBTs are connected inversely in parallel, it is possible to form the bidirectional switching device, without using the diode for a reverse breakdown voltage. A bidirectional IGBT has the bidirectional switching device, which is formed by connecting two reverse blocking IGBTs in inverse parallel, as a power chip. Next, the structure of the reverse blocking IGBT according to the related art will be described.
FIG. 15 is a cross-sectional view schematically illustrating the structure of the reverse blocking IGBT according to the related art. In the reverse blocking IGBT, in general, an active region 110 is provided at the center and a separation portion 130 is provided in the outer circumference of the active region 110 through an edge termination structure region 120. The separation portion 130 includes a p-type isolation region 31. The active region 110 is the path of a main current of a vertical IGBT including, for example, an n− drift region 1, a p base region 2, an n+ emitter region 3, an emitter electrode 9, a p collector region 10, and a collector electrode 11. The isolation region 31 is a p-type region which is formed so as to extend from the front surface of a semiconductor substrate to the p collector region 10 provided on the rear surface side. The structure of the active region 110 will be described in detail with reference to FIG. 16.
FIG. 16 is a cross-sectional view illustrating the detailed structure of the active region in the reverse blocking IGBT according to the related art illustrated in FIG. 15. The n− drift region 1 is a silicon substrate produced by a floating zone (FZ) method (hereinafter, referred to as an FZ silicon substrate). In the IGBT using the FZ silicon substrate, a high-concentration semiconductor substrate is not used, unlike in an IGBT using an epitaxial silicon substrate according to the related art. Therefore, for example, the thickness of the silicon substrate can be reduced to about 100 μm when the rated voltage of the IGBT is 600 V and can be reduced to about 180 μm when the rated voltage of the IGBT is 1200 V.
The p base region 2 is selectively provided in a surface layer of the front surface of the FZ silicon substrate which will be the n− drift region 1. The n+ emitter region 3 and the p body region 4 are selectively provided in a surface layer of the p base region 2 which is close to the front surface of the substrate. A gate electrode 7 which is made of polysilicon is provided on the surface of a portion of the p base region 2 which is interposed between the n+ emitter region 3 and the n− drift region 1, with a gate insulating film 6 interposed therebetween. The emitter electrode 9 comes into ohmic contact with both the surface of the n+ emitter region 3 and the surface of the p+ body region 4. The interlayer insulating film 8 is provided between the gate electrode 7 and the emitter electrode 9 and electrically insulates the gate electrode 7 from the emitter electrode 9.
The p collector region 10 and the collector electrode 11 which comes into ohmic contact with the p collector region 10 are provided on the rear surface side of the FZ silicon substrate which will be the n− drift region 1. When the rear surface structure of the FZ silicon substrate is formed in this way, the thickness of the p collector region 10 is reduced and the p collector region 10 is controlled to the required low impurity concentration. Therefore, it is possible to reduce the injection efficiency of a minority carrier from the p collector region 10 and to improve transport efficiency. As a result, in the reverse blocking IGBT having the above-mentioned structure, the trade-off relationship between on-voltage characteristics and turn-off loss is improved and it is possible to reduce both the on-voltage and the turn-off loss.
As this type of reverse blocking IGBT, a reverse blocking IGBT has been proposed in which a p base region is formed in the front surface of a semiconductor substrate, an n+ emitter region is formed in the p base region, a p+ isolation region and a p+ collector region are respectively formed in an outer circumferential portion (the side surface of the substrate) and the rear surface of the semiconductor substrate so as to surround the p base region, and the thickness of the p+ collector region in the rear surface is about 1 μm (for example, see JP 2002-319676 A).
In addition, as another reverse blocking IGBT, a high-breakdown-voltage semiconductor device has been proposed in which a single-layered semiconductor substrate has at least pn junctions for forward and reverse breakdown voltages formed on both sides thereof and the breakdown voltage junction termination structure of the two pn junctions is provided on the first main surface of the semiconductor substrate by a separating diffusion region. The single-layered semiconductor substrate includes a region in which an impurity concentration distribution is substantially constant from the first main surface toward the inside or impurity concentration is reduced from the first main surface toward the inside. Therefore, in the reverse blocking IGBT, it is possible to reduce a reverse leakage current, without reducing a reverse breakdown voltage (for example, see JP 2006-080269 A).
As a reverse blocking IGBT with improved electrical characteristics, the following device has been known. FIG. 17 is a diagram illustrating the electric field intensity distributions of the reverse blocking IGBT according to the related art when a forward voltage is applied and when a reverse voltage is applied. FIG. 17A illustrates the cross-sectional structure of a main portion of the reverse blocking IGBT according to the related art. In FIG. 17B, the y-axis indicates the thickness of the reverse blocking IGBT illustrated in FIG. 17A and the x-axis indicates the electric field intensity distributions when the forward voltage is applied and when the reverse voltage is applied. The distance of the y-axis means the distance to an emitter direction when the rear surface of the substrate (the interface between a p collector region 10 and a collector electrode 11) is 0 (zero). In the reverse blocking IGBT illustrated in FIG. 17A, buffer layers 201 and 202 which have the same conductivity type and high impurity concentration are provided at the interface between an n− drift region 1 and a p base region 2 and the interface between the n− drift region 1 and the p collector region 10, respectively. Therefore, it is possible to achieve an IGBT having a forward breakdown voltage value and a reverse breakdown voltage value which are equal to each other (for example, see JP 2002-532885 W).
As an IGBT with improved electrical characteristics, a device has been proposed in which a high-impurity-concentration region that has the same conductivity type as an n− drift region is provided at least a portion of the boundary between a p base region and the n− drift region. According to this structure a channel length is reduced and a voltage drop in an on state is reduced (for example, see JP 09-326486 A).
As another IGBT with improved electrical characteristics, the following device has been proposed. A short lifetime region is provided in a portion of an n drift region close to a p collector region. The short lifetime region is an n-type region and has a higher impurity concentration than an n base layer. According to this structure, it is possible to reduce the leakage current of a non-punch-through (NPT) IGBT (for example, see 09-260662 A).
As another IGBT with improved electrical characteristics, a device has been proposed which includes a second-conductivity-type collector region and a first-conductivity-type field stop region that is formed in a first-conductivity-type semiconductor substrate, has a higher impurity concentration than the first-conductivity-type semiconductor substrate, and is separated from the second-conductivity-type collector region (for example, see JP 2002-246597 A). In JP 2002-246597 A, even when a partial deficiency occurs in the collector region, an increase in the voltage drop characteristics in an on state or the deterioration of the breakdown voltage characteristics is suppressed.
As a bidirectional IGBT with improved electrical characteristics, the following device has been proposed. Gate electrodes are provided in trenches which are formed in two main surfaces of a semiconductor substrate through gate oxide films and trench MOS gate (an metal-oxide-semiconductor insulated gate) structures (hereinafter, referred to as trench gate MOS structures) are formed on the two main surfaces of the semiconductor substrate. A buffer layer which has the same conductivity type as a drift region and has a higher concentration than the drift layer is provided at the interface between the drift region and a base layer on the two main surface sides of the semiconductor substrate. In addition, a depletion layer which is spread to the drift region when an off-voltage is applied extends sufficiently to reach the high-concentration buffer layer. This structure is a punch-through structure. According to this structure, it is possible to improve the breakdown voltages in two directions to the same level and to remove an oscillation waveform when the device is turned off. In addition, it is possible to control the gate in two directions (for example, see JP 2001-320049 A).
As a reverse blocking IGBT with improved electrical characteristics, a device has been proposed in which a second trench groove is formed on the collector electrode side, an oxide film is coated on the surface of the second trench groove, the second trench groove is filled with polysilicon, a second n buffer region is formed in a portion interposed between the second trench grooves, and a depletion layer is spread to an n− drift region over the second n buffer region when a reverse bias is applied, thereby obtaining the reverse breakdown voltage equal to the forward breakdown voltage using a PT structure (for example, see JP 2003-318399 A).
However, in the reverse blocking IGBT disclosed in JP 2002-319676 A, the reverse breakdown voltage is likely to be lower than the forward breakdown voltage. Hereinafter the reason will be described. The planar reverse blocking IGBT requires the p+ isolation region which extends from the front surface of the semiconductor substrate to the p+ collector region on the rear surface side in order to ensure the reverse blocking capability. A drive diffusion (heat treatment) which is required to form the p+ isolation region is performed in an oxygen atmosphere at a high temperature for a long time in order to prevent the surface roughness of the n type silicon substrate. For example, the diffusion time of the heat treatment is about 100 hours at a temperature of 1300° C. in a device for a breakdown voltage of 600 V and is about 200 hours at a temperature of 1300° C. in a device for a breakdown voltage of 1200 V.
When the heat treatment is performed for the silicon substrate in the oxygen atmosphere at a high temperature for a long time, the doped oxygen atom is changed to a donor. In particular, when the silicon substrate has low impurity concentration, the oxygen concentration of the silicon substrate is increased by the influence of the change of the oxygen atom into the donor. Since oxygen concentration in the vicinity of the surface of the silicon substrate is reduced by outward diffusion, the impurity concentration distribution of the silicon substrate is low in the width (depth) range of a few micrometers to tens of micrometers from two main surfaces of the substrate in the depth direction and is high at the center of the substrate. The manufacturing processes of the reverse blocking IGBT include a process of forming a predetermined MOS gate structure and an aluminum electrode film on the front surface, a rear surface grinding process of reducing the thickness of the n drift region to a value required for a breakdown voltage while reducing the on-voltage, and a process of forming the p+ collector region and the collector electrode. The amount of grinding of the rear surface of the silicon substrate in the rear surface grinding process is very large, that is, equal to or more than half the original thickness of the silicon substrate. Therefore, as described above, the silicon substrate which is affected by the change of the oxygen atom into the donor has an impurity concentration distribution in which, after the rear surface grinding process, the impurity concentration is high on the collector side for which the rear surface grinding is performed and is obliquely reduced on the emitter side by the influence of outward diffusion in the width (depth range) of a few micrometers to tens of micrometers from the front surface of the substrate in the depth direction.
As a result, since the impurity concentration of a collector-side portion of the n drift region is higher than the impurity concentration of an emitter-side portion of the n drift region, the depletion layer which is spread from the collector junction (the pn junction between the p+ collector region and the n drift region) is less likely to be extended than the depletion layer which is spread from the p base junction (the pn junction between the p base region and the n drift region) on the emitter side of the reverse blocking IGBT. Therefore, since the electric field is likely to be increased by the application of a low voltage, the reverse breakdown voltage is lower than the forward breakdown voltage. The influence of the oxygen donor on the breakdown voltage is likely to cause problems when the resistivity of the silicon substrate is large, for example, when the breakdown voltage is equal to or higher than 600 V. For the curvature radius of the circumference of the original pn junction, the breakdown voltage obtained in the collector junction (reverse breakdown voltage junction) is likely to be higher than that in the p base junction (forward breakdown voltage junction). In the device with a breakdown voltage lower than 600 V, the reverse breakdown voltage is likely to be higher than the forward breakdown voltage even when the influence of the oxygen donor on the reverse breakdown voltage is considered.
The technique disclosed in JP 2002-532885 W or JP 09-326486 A has the following problems. For example, as represented by a dashed line in FIG. 17B, if the depletion layer which is spread from the collector junction 21 when the reverse voltage is applied (reverse bias) reaches an emitter-side buffer layer 201 (hereinafter, referred to as a shell region), it is less likely to be extended and the electric field increases rapidly. As a result, an electric field peak (critical electric field intensity) 212 appears in the vicinity of the collector junction 21. In contrast, as represented by a solid line in FIG. 17B, if the depletion layer that is spread from the p base junction 20 when the forward voltage is applied (forward bias) reaches the p collector region 10, similarly, the electric field increases rapidly and an electric field peak 211 appears in the vicinity of the interface of the p base junction 20. Therefore, both the forward breakdown voltage and the reverse breakdown voltage are likely to be reduced. That is, when the shell region 201 and the buffer region (collector-side buffer layer) 202 are provided, it is difficult to achieve the forward breakdown voltage and the reverse breakdown voltage which are obtained when these regions are not provided. As a method for solving the problem of the breakdown voltage being reduced, a method has been known which reduces the impurity concentration of the n− drift region 1 to increase the design breakdown voltage.
However, when the impurity concentration of the n− drift region 1 is reduced, the depletion layer is likely to be spread, but the punch-through phenomenon that the depletion layer reaches the buffer region 202 while the semiconductor device is operating is likely to occur. As a result, a new problem that the voltage waveform and the current waveform in a turn-off state (hereinafter, referred to as a turn-off waveform) oscillate arises. In addition, the reverse blocking IGBT has the characteristic that a large amount of current flows transiently during reverse recovery for which the reverse blocking IGBT is changed from an on state to a reverse blocking state (reverse recovery characteristic). Therefore, the problem that the voltage waveform and the current waveform during reverse recovery (hereinafter, referred to as a reverse recovery waveform) oscillate also arises. When the turn-off waveform and the reverse recovery waveform oscillate, there is a concern that noise will be generated. When the oscillation of the voltage waveform is very large, there is a concern that the semiconductor device will be damaged.
The invention has been made in order to solve the above-mentioned problems of the related art and an object of the invention is to provide a semiconductor device which can improve a reverse breakdown voltage and a forward breakdown voltage, suppress the oscillation of a voltage waveform and a current waveform when the semiconductor device is turned off, and suppress the oscillation of the voltage waveform and the current waveform during reverse recovery.
The present invention is directed to overcoming or at least reducing the effects of one or more of the problems set forth above.